SK Hynix, through its Senior Vice President and Head of Packaging Development, Lee Kang-wook, announced strategic developments in their HBM memory products at the Heterogeneous Integration International Summit. Lee highlighted that the customization of HBM memory is pivotally dependent on the base die, which will now include circuit IP selected by the customer, promising enhanced chip efficiency.

The company has been utilizing logic semiconductor processes for HBM memory base dies since the HBM4 generation. Lee's presentation indicated a shift in nomenclature from DRAM Base Die to Logic Base Die for HBM4, underscoring the increasing importance of logical functions in base dies.

In addition to HBM memory controllers, SK Hynix is set to apply chiplet technology to SSD SoC controllers. This innovation is expected to streamline the manufacturing process and improve the performance of storage products.

Lee also addressed the trend of some AI chip startups moving away from HBM memory in their designs, stating that while HBM remains a premium choice due to its high cost, certain applications within the AI HPC chip market still necessitate HBM memory. However, he acknowledged the existence of suitable scenarios for non-HBM memory solutions.

The company's presentation also teased potential designs for HBM5, which involve the vertical stacking of HBM memory with processors in a 3D SIP (System in Package) configuration, showcasing SK Hynix's commitment to innovation in memory technology to meet diverse customer needs. With these advancements, SK Hynix is poised to strengthen its position in the memory market, offering more efficient and customized solutions for high-performance computing applications.