The chip industry is currently facing a significant challenge in its backend processes, particularly in chip packaging and testing, which are more fragmented compared to earlier stages like lithography. Jim Hamajima, President of SEMI's Japan office, has highlighted the need for more international standards to improve efficiency and increase production capacity for major players such as Intel and TSMC.

In an interview, Hamajima pointed out that companies are trying unique solutions in their backend processes, with each using different standards, which leads to inefficiencies. "They are all using different standards, and I can't even remember their names, which is not efficient," he said. The lack of standardization in the backend processes is becoming a bottleneck as companies strive for more powerful chips, potentially impacting the industry's profit margins.

Hamajima believes that standardizing automation or material specifications would make it easier for equipment and material suppliers, allowing the industry to compete in other meaningful areas. "This would make the work of equipment and material suppliers easier and allow the industry to compete in other meaningful areas," he stated.

Chip packaging is especially crucial for breakthroughs in chip technology, as traditional methods of compressing more transistors onto a single chip are facing technical limitations. This has spurred significant investment in R&D and commercial capacity, but more is needed. For instance, TSMC's CoWoS packaging technology, considered key for cutting-edge AI chips, is struggling to ramp up production to meet demand.

In addition to his role at SEMI, Hamajima is also a director of a newly formed consortium led by Intel and 14 Japanese companies, which aims to research automation systems for backend processes. With Japanese suppliers holding a significant market share in automation equipment and materials, Japan is a convenient location for testing new standards.

"There is a competitive nature, and companies naturally want to try to make their own processes the de facto standard," Hamajima noted. He acknowledged the risk of setting standards that favor Intel, the only global chip manufacturer in the consortium. However, he emphasized that there is still time for more chip manufacturers to join the consortium, and the research will serve as a "draft" for further industry discussions.

The SEMI Japan head also touched on Japan's labor shortage issue, stating that despite investments from companies like TSMC and the Japanese government-backed startup Rapidus, there is no sign of improvement. Since the 2000s, as the domestic industry began to falter, many experienced engineers have left the industry or sought opportunities overseas.

Hamajima suggested that Japan should relax visa policies for Indian engineers and students. SEMI is set to hold its iconic Semicon semiconductor exhibition near New Delhi, India, for the first time in September. Hamajima emphasized that the event would be an excellent opportunity to showcase Japan's potential to young talent. He added that SEMI might consider matching Japanese small companies with Indian schools in the future, as small companies face greater challenges in finding talent overseas.