Samsung Electronics, a leading global semiconductor manufacturer, has announced plans to restart the construction of its Pyeongtaek P5 semiconductor factory in the third quarter of this year. This move is seen as a strategic response to the increasing demand for storage semiconductors, which has been significantly amplified by the surge in artificial intelligence (AI) applications.

According to industry reports, Samsung held a board of directors' internal management committee meeting on the 30th of last month, where the agenda for the P5 factory's foundational construction was presented and approved. The committee, chaired by CEO and head of the DX division, Jong-hee Han, included key members such as MX business division head Noh Tae-moon, management support director Park Hak-gyu, and head of the storage business division, Lee Jeong-bae.

The P5 factory's construction was initially halted in late January, with the investment timing adjusted to align with market conditions. The delay in P5's construction threatened to disrupt Samsung's "one new wafer fab per year" strategy. However, just four months later, the management committee decided to proceed with the groundwork.

The decision to resume construction is attributed to the soaring demand for high bandwidth memory (HBM) driven by AI accelerators. The HBM requires a substantial amount of DRAM wafers, necessitating an expansion of the DRAM production line. Furthermore, with the proliferation of AI on the device side, the demand for general-purpose DRAM installed in mobile and PC devices is also expected to rise.

In addition to this, the demand for NAND flash memory is also rebounding due to the increasing capacity of AI-generated learning data.

Samsung Electronics revealed in its first-quarter earnings report that it plans to increase the supply of HBM by more than three times compared to last year, based solely on this year's bit growth. If the ongoing quality tests with NVIDIA are successful, the supply scale could be significantly larger.

The P5 factory, which is expected to have eight cleanrooms, is a significant upgrade from the previous P1 to P4 factories, which only had four cleanrooms each. This scale will enable Samsung to meet market demands with large-scale production capabilities. Although the specific use of P5 has not been determined, it is anticipated to cater to the needs of both memory and system semiconductors.

The foundation work for P5 is expected to commence as early as the third quarter of this year. Considering the construction contracts with Samsung C&T and Samsung Engineering, the completion is projected for April 2027. However, the start time may be significantly earlier, depending on market conditions, as the first established production line will have priority in mass production.