SK hynix has announced that the yield (ratio of good chips) of their fifth-generation High Bandwidth Memory (HBM) HBM3E is nearing 80%.

In an interview with the Financial Times on May 21st (local time), SK hynix’s Yield Executive Vice President Kwon Jae-soon stated, “We have managed to cut the time required for mass production of HBM3E chips by 50%. The chips have almost reached the target yield of 80%.”

This marks the first time SK hynix has publicly disclosed yield information for HBM3E. Previously, the industry estimated the yield of SK hynix’s HBM3E to be between 60% to 70%.

Vice President Kwon emphasized, “Our goal this year is to focus on producing 8-layer HBM3E. In the AI era, improving yields becomes even more crucial to stay ahead.”

Manufacturing HBM, which involves stacking several DRAMs vertically, presents higher process complexity compared to standard DRAM. In particular, the yield of the silicon via (TSV), a key component of HBM3E, has been low, ranging from 40% to 60%, making its improvement a significant challenge.

Following its near-exclusive supply of HBM3 to AI semiconductor leader NVIDIA, SK hynix began delivering 8-layer HBM3E products in March and plans to supply 12-layer HBM3E products in the third quarter of this year. The 12-layer HBM4 (sixth-generation) is slated for next year, and the 16-layer version is expected to be in production by 2026.

The fast-paced development of next-generation DRAM by SK hynix is driven by the rapidly growing AI market. In 2023, HBM and high-capacity DRAM modules, used primarily for AI applications, accounted for about 5% of the total memory market by value. SK hynix predicts that by 2028, these AI memory products will represent 61% of the market.