Pure-play foundry TSMC remains aggressive in expanding its advanced packaging business, which will generate nearly US$3 billion in revenues this year, according to company chairman Mark Liu.
TSMC is reportedly set to kick off volume production of SoIC (system-on-integrated chips) packaging technology in 2020 as scheduled despite headwinds facing the global semiconductor industry. This is expected to usher in a new era of 3D IC and further turn the company from an IC foundry into a system foundry, according to industry sources.
Deriving from 3D stacking concepts such as wafer-on-wafer and chip-on-wafer, SoIC can integrate logic IC, memory, and chips fabricated on different process nodes such as 10nm I/O devices paired with 7nm core chips, the sources said.
SoIC will enable TSMC to embrace more orders from leading IC designers, IDMs, system makers and even web giants seeking to develop chips on their own, as the technology can help the company offer optimal solutions with best performance and highest price-performance ratios, the sources indicated.
SoIC is more advanced than TSMC's existing wafer-level packaging processes CoWoS and InFO, but will not compete with them in serving customers, the sources commented.
In fact, TSMC is slated to apply its 4th generation CoWoS technology to package core HPC chips, networking chips and switch chips in 2019 and launch the 5th generation of the process in 2020. Also, TSMC will soon adopt InFO_oS and InFO_MS technologies to package diverse specs of HPC chips that are massively demanded such as those for 5G network infrastructure.
Industry sources said that TSMC will keep pursuing more advanced and multi-function packaging technologies to help clients integrate heterogeneous chips and break through the limits of Moore's Law in chip scaling.
The sources stressed that heterogeneous chipset integration is increasingly needed to support proliferating 5G, AI, IoT, and automotive electronics applications, as diverse types of high performance computing chips can be integrated into SoCs for many applications including 5G smartphones, C-V2X (cellular vehicle –to-everything) communication systems, smart MEMS sensors, and datacenters.
This, coupled with the requirements for slim design, good heat dissipation performance, and low IP costs by some applications, will provide great momentum for TSMC in promoting its niche WLSI (wafer-level-system-integration) platform, the sources noted. |