Non-volatile memory often has the first pick of a new silicon fabrication process, as it is a low-risk development. A NAND flash chip is essentially a sea of transistors, with a fraction of R&D cost of something as specialized as a CPU die. It should come as no surprise, then, that the first chips to be built on Intel's swanky new 10 nanometer fabs will be a 64-layer 3D NAND flash memory, the first of its kind for data center applications.

With its 10 nm process, Intel is introducing FinFET Hyper Scaling, Intel will increase transistor densities by 2.7 times over the kind of densities one would traditionally expect from 10 nm. This lets the company scale up NAND flash storage densities by just that much more. The first 10 nm 64-layer 3D NAND flash chips will have high data densities, while at the same time, Intel will be able to push low volumes, characteristic of a new process. This explains why the first SSDs built with these chips are targeted at data-centers, so fairly expensive, high-capacity SSDs can be pushed to customers that can afford them.