Market profile brands, distribution, presentations, and a brand blog so that you are familiar with recent developments of various brands of the latest!
JCET Newsmore»
Financial Reportingmore»
JCET 2023Q3 Earning release
JCET 2023Q2 Earning release
 JCET 2023Q1 Earning release
 JCET 2022Q4 Earning release
JCET Contact
Add: No. 78 Changshan Rd, Jiangyin, Jiangsu Province
Sales Contact:Gemini Miao
Mobile:+86 18860992216
Email:sales@jcap.com.cn
About JCET
JCET Website http://www.cj-elec.com/en
Jiangsu Changjiang Electronics Technology Co., Ltd.(JCET) was established in 1972, and in 2003 it was successfully listed on the main board of the Shanghai Stock Exchange. After more than forty years of development, JCET has become the largest IC packaging and testing company in China and the third largest in the world.

The company provides global customers with packaging design, product development and certification, with a full range of services including semiconductor design, wafer probe, bump, packaging, test and drop shipment.

JCET is committed to sustainable development and a win-win philosophy that achieves a harmonious outcome for employees, customers, shareholders and our communities. The company has been rated as a national key high-tech enterprise and is listed in the National Top 10 Electronic Enterprises. Moreover, JCET is leading China’s strategic alliance in the IC packaging and testing industry. JCET is a well-known Chinese brand and has been recognized as a Model Enterprise in China for Quality of Exported Products. The company has a National Engineering Laboratory for high-density IC packaging technology, the only one of its kind, and has a state-level corporate technology center, as well as a post-doctoral research center.

Currently, JCET ranks first place in the world among IC packaging and testing companies in terms of the quantity and quality of the patents issued in China and in the United States.

JCET has an R & D and sales network that supports all the key semiconductor markets globally.

The company has an extensive portfolio of technology and solutions, including the intellectual property (IP) rights of Fan-out embedded Wafer Level Ball Grid Array (eWLB), wafer level chip scale packaging (WLCSP), wafer bump, Package-on-Package (PoP), flip chip Ball Grid Array (fcBGA), System-in-Package (SiP), and other leading technologies. Moreover, our lead frame packaging and the discrete devices have won recognition from multiple customers.